Attachment 387 Details for Bug 359 – Implements vectorized product between aligned matrix and unaligned vector (please review)

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[patch] Implements vectorized product between aligned matrix and unaligned vector (please review)

bug359.patch (text/plain), 4.83 KB, created by Christoph Hertzberg on 2013-10-21 14:33:13 UTC

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Creator: Christoph Hertzberg

Created: 2013-10-21 14:33:13 UTC

Size: 4.83 KB

patch

obsolete

># HG changeset patch
># User Christoph Hertzberg <chtz@informatik.uni-bremen.de>
># Date 1382358357 -7200
># Node ID efe2382651d64815be0164851b33f55faf35833c
># Parent  0720fd0684a9463b62bf6682f65b7fed29f4f650
>Bug 359: Allow vectorized products of (aligned result) = (Aligned matrix) * (unaligned expression);
>
>diff --git a/Eigen/src/Core/Assign.h b/Eigen/src/Core/Assign.h
>--- a/Eigen/src/Core/Assign.h
>+++ b/Eigen/src/Core/Assign.h
>@@ -43,17 +43,17 @@ private:
>     PacketSize = packet_traits<typename Derived::Scalar>::size
>   };
> 
>   enum {
>     StorageOrdersAgree = (int(Derived::IsRowMajor) == int(OtherDerived::IsRowMajor)),
>     MightVectorize = StorageOrdersAgree
>                   && (int(Derived::Flags) & int(OtherDerived::Flags) & ActualPacketAccessBit),
>     MayInnerVectorize  = MightVectorize && int(InnerSize)!=Dynamic && int(InnerSize)%int(PacketSize)==0
>-                       && int(DstIsAligned) && int(SrcIsAligned),
>+                       && int(DstIsAligned),
>     MayLinearize = StorageOrdersAgree && (int(Derived::Flags) & int(OtherDerived::Flags) & LinearAccessBit),
>     MayLinearVectorize = MightVectorize && MayLinearize && DstHasDirectAccess
>                        && (DstIsAligned || MaxSizeAtCompileTime == Dynamic),
>       /* If the destination isn't aligned, we have to do runtime checks and we don't unroll,
>          so it's only good for large enough sizes. */
>     MaySliceVectorize  = MightVectorize && DstHasDirectAccess
>                        && (int(InnerMaxSize)==Dynamic || int(InnerMaxSize)>=3*PacketSize)
>       /* slice vectorization can be slow, so we only want it if the slices are big, which is
>diff --git a/Eigen/src/Core/products/CoeffBasedProduct.h b/Eigen/src/Core/products/CoeffBasedProduct.h
>--- a/Eigen/src/Core/products/CoeffBasedProduct.h
>+++ b/Eigen/src/Core/products/CoeffBasedProduct.h
>@@ -300,17 +300,16 @@ struct product_coeff_impl<InnerVectorize
> {
>   typedef typename Lhs::PacketScalar Packet;
>   typedef typename Lhs::Index Index;
>   enum { PacketSize = packet_traits<typename Lhs::Scalar>::size };
>   static EIGEN_STRONG_INLINE void run(Index row, Index col, const Lhs& lhs, const Rhs& rhs, RetScalar &res)
>   {
>     Packet pres;
>     product_coeff_vectorized_unroller<UnrollingIndex+1-PacketSize, Lhs, Rhs, Packet>::run(row, col, lhs, rhs, pres);
>-    product_coeff_impl<DefaultTraversal,UnrollingIndex,Lhs,Rhs,RetScalar>::run(row, col, lhs, rhs, res);
>     res = predux(pres);
>   }
> };
> 
> template<typename Lhs, typename Rhs, int LhsRows = Lhs::RowsAtCompileTime, int RhsCols = Rhs::ColsAtCompileTime>
> struct product_coeff_vectorized_dyn_selector
> {
>   typedef typename Lhs::Index Index;
>@@ -376,20 +375,21 @@ struct product_packet_impl<RowMajor, Unr
>     res =  pmadd(pset1<Packet>(lhs.coeff(row, UnrollingIndex)), rhs.template packet<LoadMode>(UnrollingIndex, col), res);
>   }
> };
> 
> template<int UnrollingIndex, typename Lhs, typename Rhs, typename Packet, int LoadMode>
> struct product_packet_impl<ColMajor, UnrollingIndex, Lhs, Rhs, Packet, LoadMode>
> {
>   typedef typename Lhs::Index Index;
>+  enum {LhsLoadMode = Lhs::Flags  & ActualPacketAccessBit ? Aligned : Unaligned};
>   static EIGEN_STRONG_INLINE void run(Index row, Index col, const Lhs& lhs, const Rhs& rhs, Packet &res)
>   {
>     product_packet_impl<ColMajor, UnrollingIndex-1, Lhs, Rhs, Packet, LoadMode>::run(row, col, lhs, rhs, res);
>-    res =  pmadd(lhs.template packet<LoadMode>(row, UnrollingIndex), pset1<Packet>(rhs.coeff(UnrollingIndex, col)), res);
>+    res =  pmadd(lhs.template packet<LhsLoadMode>(row, UnrollingIndex), pset1<Packet>(rhs.coeff(UnrollingIndex, col)), res);
>   }
> };
> 
> template<typename Lhs, typename Rhs, typename Packet, int LoadMode>
> struct product_packet_impl<RowMajor, 0, Lhs, Rhs, Packet, LoadMode>
> {
>   typedef typename Lhs::Index Index;
>   static EIGEN_STRONG_INLINE void run(Index row, Index col, const Lhs& lhs, const Rhs& rhs, Packet &res)
>@@ -397,19 +397,20 @@ struct product_packet_impl<RowMajor, 0, 
>     res = pmul(pset1<Packet>(lhs.coeff(row, 0)),rhs.template packet<LoadMode>(0, col));
>   }
> };
> 
> template<typename Lhs, typename Rhs, typename Packet, int LoadMode>
> struct product_packet_impl<ColMajor, 0, Lhs, Rhs, Packet, LoadMode>
> {
>   typedef typename Lhs::Index Index;
>+  enum {LhsLoadMode = Lhs::Flags  & ActualPacketAccessBit ? Aligned : Unaligned};
>   static EIGEN_STRONG_INLINE void run(Index row, Index col, const Lhs& lhs, const Rhs& rhs, Packet &res)
>   {
>-    res = pmul(lhs.template packet<LoadMode>(row, 0), pset1<Packet>(rhs.coeff(0, col)));
>+    res = pmul(lhs.template packet<LhsLoadMode>(row, 0), pset1<Packet>(rhs.coeff(0, col)));
>   }
> };
> 
> template<typename Lhs, typename Rhs, typename Packet, int LoadMode>
> struct product_packet_impl<RowMajor, Dynamic, Lhs, Rhs, Packet, LoadMode>
> {
>   typedef typename Lhs::Index Index;
>   static EIGEN_STRONG_INLINE void run(Index row, Index col, const Lhs& lhs, const Rhs& rhs, Packet& res)

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chtz: review? (gael.guennebaud)

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